 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| Ordering number : EN *5846 CMOS IC LC82221L Motion JPEG Decoder Preliminary Overview The LC82221L is a full-color digital image data expansion IC that accepts data in formats that essentially conform to the JPEG standard. With the provision of frame memory, this IC can input and output image data in standard video formats. In addition, it also supports a wide range of image display functions using that frame memory. As compared to earlier JPEG ICs, this IC features simplified JPEG functionality and a greater emphasis on display functions. Thus it supports the creation of excellent costperformance ratio systems for applications that require a display system. * Users can select either RGB or YUV for image data output. * Built-in YUV to RGB color conversion circuit * The LC82221L supports image sizes up to 1024 pixels in the horizontal direction. The range of vertical sizes handled can be set up arbitrarily, since it is limited by the size of the DRAM provided. * 3.3-V single-voltage power supply. Low power. * The display position and display size can be set. * SOI and EOI marker support * Horizontal and vertical scrolling display functions * Support for overwrite display, in which the next data for expansion is displayed by overwriting the previously expanded image data Features * High image quality image expansion using the JPEG system * Superlative cost performance achieved by only providing decoding functions. * Two built-in quantization tables. * High-speed processing achieved by using fixed Huffman tables. Application do not have to set up these tables. * Two Huffman tables, one for luminance data and one for chrominance data, are provided. * Supports scaling factor parameters that allow the quantization factor to be changed. * DRAM for code data buffering and image data playback can be connected directly. * Applications can use either 2Mb or 4Mb DRAMs based on the sizes of the image handled and the structure of the system. However, 16-bit data path DRAMs must be used. * Image data is output in synchronization with an image display synchronizing signal. * Color structure of the code data is Y:U:V=4:1:1. * Dedicated code data input bus provided to avoid loading the host bus. DMA transfers are also supported. Package Dimensions unit: mm 3214-SQFP144 [LC82221L] SANYO: SQFP144 SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN 62698RM (OT) No. 5846-1/7 LC82221L Block Diagram No. 5846-2/7 LC82221L Specifications Electrical Characteristics Absolute Maximum Ratings at VSS = 0 V Parameter Maximum supply voltage Input and output voltage Input and output current Operating temperature Storage temperature Symbol VDD VI, VO II, IO Topr Tstg Conditions Ratings -0.3 to +4.6 -0.3 to VDD+0.3 -20 to +20 -30 to +70 -55 to +125 Unit V V mA C C Allowable Operating Ranges at Ta = -30 to +70C Parameter Supply voltage Input voltage Symbol VDD VIN Conditions Ratings min 3.0 0 typ 3.3 max 3.6 VDD Unit V V DC Characteristics at Ta = -30 to +70C, VDD = 3.0 to 3.6 V, VSS = 0 V Parameter Input high-level voltage Input low-level voltage Input high-level voltage Input low-level voltage Input high-level current Input low-level current Output high-level voltage Output low-level voltage Output leakage current Pull-up resistance Applicable Pins (1) CTLCPU, CTLA, CTLD, CLKSEL, CLK, CDD, TEST, MD, DG, DB, DR, ZPXEN, ZHSYNC, ZVSYNC, PXCLK (2) ZCTLCS, ZCTLRD, ZCTLWR, ZRESET, ZCDCS, ZCDWR (3) CTLCPU, CTLA, CTLD, CLKSEL, CLK, CDD, TEST, DG, DB, DR, ZPXEN, ZHSYNC, ZVSYNC, PXCLK, ZCTLCS, ZCTLRD, ZCTLWR, ZRESET, ZCDCS, ZCDWR (4) MD (5) ZCTLRDY, CTLD, ZCDRDY, MD, DG, DB, DR (6) MD Symbol VIH1 VIL1 VIH2 VIL2 IIH IIL1 IIL2 VOH VOL IOZ RUP Conditions Ratings min 0.7 VDD 0.2 VDD 0.75 VDD 0.15 VDD -10 -10 -100 VDD - 0.8 0.4 -10 70 140 +10 280 +10 +10 -10 typ max Unit V V V V A A A V V A k CMOS level inputs: (1) CMOS level Schmitt inputs: (2) VIN = VDD; All input pins (including bus pins) VIN = VSS : (3) VIN = VDD; Pins with pull-up resistors: (4) IOH = -6 mA; All output pins (including bus pins) IOL = 6 mA; All output pins (including bus pins) When set to high-impedance output: (5) (6) No. 5846-3/7 LC82221L Pin Functions Pin Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 VSS VDD ZCDCS/ZCDACK ZCDINT/ZCDREQ ZCDWR ZCDRDY CDD15 CDD14 CDD13 CDD12 I O I O I I I I Code bus data (CDD8 to CDD15 are unused in 8-bit mode.*) ZRESET CTLA5 CTLA4 CTLA3 CTLA2 CTLA1 CTLA0 VDD VSS CTLD7 CTLD6 CTLD5 CTLD4 CTLD3 CTLD2 CTLD1 CTLD0 VDD VSS CLKSEL0 CLKSEL1 CLK I I I NC I NC Ground +3.3-V power supply Code bus select/code bus DMA acknowledge Code bus interrupt/code bus DMA request Code bus data write signal Code bus ready (tri-state output) Hardware reset I/O I/O I/O I/O I/O I/O I/O I/O +3.3-V power supply Ground Clock divisor setting CLKSEL1:0 = 00: No divisor, 01: Divisor = 2, 10: Divisor = 3. System (decode) clock input Control bus data Pin Name VSS ZCTLINT ZCTLCS ZCTLRD/RW ZCTLWR/DS ZCTLRDY CTLCPU VDD VSS NC NC I I I I I I +3.3-V power supply Ground Control bus address O I I I O I Type Ground Control bus interrupt request Control bus select Control bus read or R/W select Control bus write/data strobe Control bus ready (tri-state output) Control bus CPU type selection +3.3-V power supply Ground Description Note: * These pins must be pulled up with a resistance of about 10 k. Continued on next page. No. 5846-4/7 LC82221L Continued from preceding page. Pin Number 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 TEST0 TEST1 TEST2 TEST3 TEST4 VSS VDD ZOE ZWEL ZRAS ZCASL ZWEH/ZCASH VSS MD15 MD14 MD13 MD12 MD11 MD10 MD9 MD8 MD7 MD6 VDD I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O +3.3-V power supply Frame memory interface data bus O O O O O Pin Name VDD VSS CDD11 CDD10 CDD9 CDD8 CDD7 CDD6 VDD VSS CDD5 CDD4 CDD3 CDD2 CDD1 CDD0 VSS VDD NC NC NC I I I I I Ground +3.3-V power supply Memory output enable Memory write enable (L) Row address strobe Column address strobe (L) Memory write enable (H)/column address strobe (H) Ground Test pins * I I I I I I +3.3-V power supply Ground Code bus data I I I I I I +3.3-V power supply Ground Code bus data Type +3.3-V power supply Ground Description Note:* These pins must be tied to ground. Continued on next page. No. 5846-5/7 LC82221L Continued from preceding page. Pin Number 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 Pin Name VSS MD5 MD4 MD3 MD2 MD1 MD0 VDD MA8 MA7 MA6 MA5 MA4 MA3 MA2 MA1 MA0 VSS VDD DG7 DG6 DG5 DG4 DG3 DG2 DG1 DG0 VSS VDD DB7 DB6 DB5 DB4 DB3 DB2 VDD VSS DB1 DB0 DR7 DR6 DR5 DR4 VSS O O O O O O Ground Pixel data bus R (Y) * O O O O O O +3.3-V power supply Ground Pixel data bus B (V) * Pixel data bus B (V) * O O O O O O O O Ground +3.3-V power supply Pixel data bus G (U) * O O O O O O O O O Ground +3.3-V power supply Frame memory address signals I/O I/O I/O I/O I/O I/O +3.3-V power supply Frame memory interface data bus Type Ground Description Note: * These pins must be pulled up with a resistance of about 10 k. Continued on next page. No. 5846-6/7 LC82221L Continued from preceding page. Pin Number 135 136 137 138 139 140 141 142 143 144 Pin Name DR3 DR2 DR1 DR0 ZPXEN ZBLANK ZHSYNC ZVSYNC PXCLK VDD Type O O O O I O I I I Pixel data enable signal Blanking signal Horizontal synchronizing signal Vertical synchronizing signal Pixel clock +3.3-V power supply Pixel data bus R (Y) * Description Note:* These pins must be pulled up with a resistance of about 10 k. s No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of which may directly or indirectly cause injury, death or property loss. s Anyone purchasing any products described or contained herein for an above-mentioned use shall: Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors and all their officers and employees, jointly and severally, against any and all claims and litigation and all damages, cost and expenses associated with such use: Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors or any of their officers and employees jointly or severally. s Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of June, 1998. Specifications and information herein are subject to change without notice. PS No. 5846-7/7 |
Price & Availability of LC82221
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |